WISH - 4th Workshop on Infrastructures for Software/Hardware co-design
About WISH
The development of co-designed hardware and software systems is hindered by the lack of available fast, accurate, and reliable infrastructures for performance evaluation and analysis. Simultaneously varying both software and hardware system component introduces complexities that render traditional evaluation methodologies inappropriate: they assume that either the hardware or the software components of a system are fixed. For example, an accepted methodology for evaluating the effectiveness of a compiler optimization is to compare the execution of two differently compiled binaries on the same hardware. Likewise, an accepted methodology for evaluating microarchitectural hardware changes has been to measure relatively short, but representative, samples of the same program's execution with multiple configurations of a detailed timing simulator.
Nonetheless, both industry and academia pursue projects to co-design hardware and software systems. Researchers have been forced to build their own custom infrastructures and to invent methodologies to demonstrate the viability of their ideas. This workshop brings together experienced practitioners to share their expertise and knowledge with a wider audience in hopes of broadening community understanding and participation. We seek to identify readily available building blocks and tools, along with opportunities for further improvements.
Submission Topics
Topics of interest include, but are not limited to:
- Trace-based and simulation-based infrastructures
- Performance analysis tools and profiling techiques
- Algorithms and representations for co-design
- Design and optimization of novel architectures
- System design
- Language support for dynamic optimization
- Software to hardware mapping
- FPGA-based prototyping
- Novel methodologies for evaluating co-designed:
- Mobile environments
- Virtual execution environments
- Dynamic optimization techniques
- Static compilation techniques
- Graphics systems
- Memory systems, including transactional and consistency models
- Parallelization detection/exploitation techniques
Important Dates
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February 10thFebruary 24th: Extended abstracts due - March 9th: Notification of acceptance
- April 1st : Workshop date
Submission Guidelines
Please, submit a 3 page double spaced extended abstract at https://www.easychair.org/conferences/?conf=wish12.Workshop Organizers
Edson Borin, University of CampinasNaveen Neelakantam, Intel Corporation
Sally McKee, University of Chalmers
Rick McGeer, HP
